Recently, a three-dimensional package device having a three-dimensional device structure has been developed. This three-dimensional package device is highly efficient in terms of space usage and is obtained by stacking single-crystal silicon (Si) substrates or the like having, e.g., logic or memory functions, to form a multi layered structure, and connecting the layers with interconnections.
To realize three-dimensional package device, the interconnection through holes, diameters thereof ranging between 10 μm and 70 μm, must be formed in the silicon substrates, thickness thereof ranging between 100 μm and 200 μm, and this requires very high-rate etching.
There is disclosed in Japanese Patent Laid-open Publication No. 2002-093776 (paragraph 0034, 0037) a method for realizing a high-rate silicon etching of about 20 μm/min by using a gas having a large number of Fs in one molecule, e.g., SF6 (sulfur hexafluoride) or S2F10 (disulfur decafluoride), as a fluorine-containing compound gas and by converting the gas into a plasma with a gas pressure in a process chamber being set as high as 13 pa to 1,333 pa (100 mTorr to 10 Torr) to generate a sufficient amount of radicals therefor.
However, when a silicon portion is etched by using SF6, SiF4s (silicon tetrafluoride) are produced as an etching reaction product as a consequence of fluorine radicals reacting with Si, as shown in the following reaction equation 1:4F*+Si→SiF4  [Reaction Equation 1]
The SiF4s produced in the holes are emitted from the holes. However, when an etching rate of the silicon reaches several tens of μm/min, an amount of etching reaction product emitted from the holes becomes as large as that of fluorine radicals which are supplied into the holes, as a consequence of the SiF4s formed thereinside correspondingly increasing. This increase in a partial pressure of SiF4s inside the holes limits increasing of a partial pressure of fluorine radicals, resulting in preventing the etching speed (etching rate) from further being increased.
In addition, Japanese Patent Laid-open Publication NO. S61-032429 (page 2) discloses an etching method in which the silicon portion is etched by using SF6 gas as a process gas, wherein a partial pressure of the gas is set to 50 Pa and SF6 molecules are vibrated and excited with CO2 laser of 10 kw, but it is deficient in that it does not disclose an etching method for etching the silicon portion at high etching rate of more than 20 μm/min.
The present invention is invented according to the above circumstances, the object of the present invention is to provide a plasma etching method and an apparatus capable of etching silicon at a high rate when etching a portion of an object to be processed.